Join Ciena as a Senior Team Lead Digital Verification Engineer in Ottawa, where you will implement cutting-edge verification strategies for the telecommunications industry. Leverage your expertise to guide and inspire your team.With a commitment to shaping the future of networking, at Ciena, you'll lead a talented team focusing on the validation of the Wavelogic modem's Forward Error Correction (FEC) technology. Drawing upon 10+ years of experience,



your role encompasses developing cutting-edge test plans and optimizing collaboration among various engineering teams to achieve exceptional quality in digital verification.Key Responsibilities:Oversee the development and execution of verification plansValidate FEC functional blocks with formal and simulation techniquesCreate and optimize testbench environments using System Verilog UVMMentor junior engineers on industry best practicesUpdate stakeholders on verification progress and risk assessmentsRequirements:10+ years in digital verification engineeringBachelor's degree in relevant engineering fieldsProficiency in System Verilog, C/C++, UVM, and SVAStrong communication and decision-making skillsAbility to mentor and lead engineers effectivelyEmbrace this exceptional opportunity at Ciena to influence the progression of telecommunications through your leadership in digital verification.

📌 Senior Team Lead Digital Verification Engineer (Riviere-des-Prairies—Pointe-aux-Trembles)
🏢 Ciena
📍 Riviere-des-Prairies—Pointe-aux-Trembles