Step into a transformative role at AMD as a DFX Scan/ATPG Engineer, wherein your input will directly influence next-generation computing. Focus on DFT solutions that optimize test quality across products.Working within the SoC Design-for-Test team, you will engage in the critical tasks of scan insertion, test optimization, and collaboration with diverse engineering teams. This role offers the chance to improve silicon bring-up activities and enhance manufacturability through your solid analytical skills and problem-solving abilities in DFT.Key Responsibilities:Implement advanced DFT solutions for SoC productsDevelop and validate methodologies for pattern generationAnalyze and improve scan coverage and ATPG executionCollaborate to identify and resolve DFT challengesDrive automation and scripting to enhance productivityRequirements:Experience with DFT, scan insertion, and test methodologiesFamiliarity with digital design fundamentals and ASIC flowsProficient in scripting languages like Perl or ShellStrong debugging skills in gate-level simulationBachelor's or Master's degree in related areaLeverage your DFT skills and drive AMD's innovations from either Markham or Ottawa.

📌 Dft Engineer - Soc Design At Amd (Riviere-des-Prairies—Pointe-aux-Trembles)
🏢 Advanced Micro Devices
📍 Riviere-des-Prairies—Pointe-aux-Trembles