23 Sep
|
FHLB Des Moines
|
Burnaby
23 Sep
FHLB Des Moines
Burnaby
Microchip Technology Inc. in Burnaby, BC is seeking a Senior Physical Design Engineer to join our Implementation team. You will execute chip development flows including place & route, physical design verification, and static timing for high‑performance SOCs/ASICs.
You will work with CAD, Packaging, Mixed Signal, Operations and Design groups to ensure timely tape‑out. A 4‑year Electrical or Electronics Engineering degree and 7.5+ years ASIC experience are required, with solid Verilog/VHDL and
📌 Senior Physical Design Engineer High Performance Asics Burnaby
🏢 FHLB Des Moines
📍 Burnaby