AMD is seeking an experienced Design Verification Engineer to verify PCIe IP and subsystems, using System Verilog and UVM. You will collaborate with architecture, design, and validation teams to develop verification strategies and drive coverage closure in a quick-paced workplace.
The role provides broad exposure to the ASIC development lifecycle from RTL to silicon bring-up, with opportunities to lead verification projects and contribute to first-pass silicon success at AMD.
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📌 Design Verification Engineer Hybrid; Pcie/soc Expert Vancouver
🏢 Advanced Micro Devices
📍 Vancouver
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