Step into a transformative role at AMD as a DFX Scan/ATPG Engineer, wherein your input will directly influence next-generation computing. Focus on DFT solutions that optimize test quality across products.

Working within the SoC Design-for-Test team, you will engage in the critical tasks of scan insertion, test optimization, and collaboration with diverse engineering teams. This role offers the chance to improve silicon bring-up activities and enhance manufacturability through your strong analytical skills and problem-solving abilities in DFT.

Key Responsibilities:
• Implement advanced DFT solutions for SoC products
• Develop and validate methodologies for pattern generation
• Analyze and improve scan coverage and ATPG execution




• Collaborate to identify and resolve DFT challenges
• Drive automation and scripting to enhance productivity

Requirements:
• Experience with DFT, scan insertion, and test methodologies
• Familiarity with digital design fundamentals and ASIC flows
• Proficient in scripting languages like Perl or Shell
• Robust debugging skills in gate-level simulation
• Bachelor’s or Master’s degree in related area

Leverage your DFT skills and drive AMD's innovations from either Markham or Ottawa.
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📌 DFT Engineer - SoC Design at AMD (Quebec City)
🏢 Advanced Micro Devices
📍 Quebec City