Shape the future of silicon technology as a Pre-Silicon Signoff Engineering Lead at Synopsys. Focus on advanced high-speed communication protocols like PCIe and Ethernet.

In this role, you will lead efforts across multiple engineering disciplines to ensure solid verification and design processes. Your extensive experience will help mold creative solutions while fostering collaboration within teams. Mentoring junior engineers will be a key aspect of your contribution to the Synopsys mission.

Key Responsibilities: • Work with various teams to ensure robust designs • Create and uphold verification plans aligned with targets • Monitor execution through regular verification meetings • Report on key verification metrics • Produce high-quality sign-off documentation

Requirements: • MSc or PhD in Electrical/Computer Engineering • 10+ years of relevant experience • Deep understanding of high-speed protocols • Proficient in SystemVerilog and UVM • Solid scripting background in Python and C/C++

Drive innovation and support the delivery of high-performance connectivity solutions while leading sign-off activities at Synopsys.

📌 Pre-Silicon Signoff Engineering Lead (Winnipeg)
🏢 Synopsys
📍 Winnipeg