Elevate your career as an Expert FPGA Design Engineer with a tech leader focused on advanced hardware solutions. Lead FPGA designs from specification to timing closure using your SystemVerilog skills. This role focuses on candidates with 10-15 years of FPGA engineering experience.
You'll be responsible for transforming detailed specifications into high-quality implementations while ensuring robust design through timing analysis and CDC management. The position demands thorough knowledge in synchronization strategies for reliability. Key Responsibilities:
- Design and implement FPGA logic through SystemVerilog
- Translate specifications into effective FPGA micro-architectures
- Manage designs throughout their lifecycle
- Drive timing closure and analyze Clock Domain Crossings
- Oversee CDC verification and synthesis flow Requirements:
- 10–15 years of practical experience in FPGA design
- Robust current proficiency in SystemVerilog
- Proven experience in ownership of FPGA designs
- Knowledge of analysis and synchronization strategies
- Experience with scripting languages such as Tcl or Python Join a team that values your FPGA design expertise and contributes to groundbreaking projects.