Shape the future of AI with a Principal SerDes Design Engineer role, focused on high-speed interconnect technologies and next-gen transceiver architecture. Make an impact in a cutting-edge field. In this senior position, you will define the architecture and specifications for next-generation SerDes and lead the design of critical blocks.

Your expertise will involve overseeing system-level modeling with advanced tools such as MATLAB and SystemVerilog, and designing high-performance analog/mixed-signal circuits in advanced node technologies. Key Responsibilities:

- Define architecture and circuit topologies for SerDes
- Oversee system-level modeling and behavioral analysis
- Design analog/mixed-signal circuits at advanced nodes
- Manage the design of RX/TX equalization circuits
- Lead lab validation and characterization of SerDes IPs Requirements:
- Master’s or PhD in Electrical Engineering
- 10+ years of SerDes design experience
- Proven record in high-speed design tape-out
- Extensive background in advanced node technologies
- Strong cross-functional collaboration and communication skills Bring your cutting-edge design skills and experience to deliver transformative SerDes solutions in this Principal role.

📌 Lead SerDes Designer for AI Technology (Vancouver)
🏢 CELERO COMMUNICATIONS
📍 Vancouver