Seeking an experienced engineer for SoC RTL design and verification in Toronto, requiring 3+ years of experience with Verilog/SystemVerilog for chip integration. Offers a hybrid mode.
📌 Ai Soc Design Engineer - Rtl & Verification (Hybrid) - C$109,380 - C$154,420 A Year (Winnipeg)
🏢 Multinational Technology
📍 Winnipeg
Reply to this offer
Impress this employer describing Your skills and abilities, fill out the form below and leave Your personal touch in the presentation letter.