Maintain and add new functionality to our FPGA code base, including code to control and test our SDR (software-defined radio) and SDN (software-defined network);
Design custom IP for recent features of both Kepler's satellites and ground stations;
Add support for new sensors/communication interfaces (such as SPI, I2C, UART);
Work with high-speed FPGA interfaces (e.g. JESD204b, 10G Ethernet, Aurora).
Requirements
2+ years in an Electrical or Computer Engineering degree program, or equivalent.
Experience with Verilog, SystemVerilog, or VHDL. (You will be working in SystemVerilog).
Currently enrolled in an undergraduate program at a Canadian post-secondary institution and returning to studies after the internship.
Available for a full-time, 4–16 month internship beginning January 2027.
We have a strong preference for candidates who can work from our Toronto office at least 2–3 days per week to support collaboration and team engagement.
We recognize that exceptional candidates may require a different arrangement and are open to discussing flexibility where appropriate.
Core Competencies
Demonstrates expertise in FPGA development, including proficiency in SystemVerilog and experience with high-speed interfaces. Capable of designing custom IP and integrating new communication interfaces for advanced satellite and ground station functionalities.