Celero Communications, Inc. seeks a Principal High-Speed Analog Layout Design Engineer to lead the layout of analog and mixed-signal IP blocks for advanced optical systems. You will own floor planning, routing, and signoff checks, collaborating with circuit designers and CAD/PDK teams.
The role requires mentoring junior engineers across time zones and delivering first-pass silicon through LVS/DRC/ER, with hands-on work in Cadence Virtuoso and related tools.
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📌 Senior High-Speed Analog Layout Architect (Quebec City)
🏢 CELERO COMMUNICATIONS
📍 Quebec City
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