Expand your career as a Senior FPGA Design Engineer in Ottawa, where you'll take charge of FPGA designs and work alongside various teams to deliver exceptional engineering solutions.

This full-time on-site position is perfect for seasoned engineers looking for a stable opportunity with prospects for a Design Prime role. You’ll use your SystemVerilog expertise and timing analysis skills to ensure designs are efficient and ready for production.

Key Responsibilities:
• Design and implement micro-architectures in SystemVerilog
• Analyse Clock Domain Crossings (CDC) and confirm synchronizations
• Own the FPGA synthesis process from setup to timing closure
• Evaluate timing and synthesis reports for effective solutions
• Collaborate to ensure designs meet verification standards

Requirements:
• 10-15 years of FPGA design experience necessary
• Strong familiarity with SystemVerilog and CDC
• Experience in configuring FPGA synthesis tools
• Comprehensive understanding of timing constraints (SDC)
• Full-time, in office work in Ottawa required

Lead with your design acumen and contribute to our innovative team in Ottawa.
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📌 Senior FPGA Engineer Role in Ottawa (Quebec City)
🏢 European Recruitment
📍 Quebec City