stem Architect Verification Engineer Ottawa, ON, Canada | Full time | Ranovus Ranovus is a fabless semiconductor company headquartered in Ottawa, Canada, developing next-generation co-packaged optics (CPO) solutions for AI and data center interconnects. Our Odin optical engine integrates a Quantum Dot Multi-Wavelength Laser, Photonic Integrated Circuit (PIC), and ASIC into a single co-packaged module – delivering the performance and density required by hyperscale AI infrastructure.

The System Architect

Verification engineer develops and runs behavioral simulations and control verification tests for the optical engine (OE). Working in System Verilog and RTL, you will validate control algorithm, bring-up sequences, and link training algorithms before silicon is available – ensuring firmware and ASIC logic are correct before the first chip arrives.

Build and run control verification testbenches: mission mode, bring-up sequences, link training,



OE calibration, and fault recovery state machines. Verify closed-loop (feedback) control algorithms used to calibrate and stabilize PIC components, such as bias and wavelength locking loops. Perform RTL-level verification of ASIC control blocks in collaboration with the ASIC team.

S. in Electrical Engineering or related field with 6+ years of experience, or Ph.D. with 3+ years of experience, in digital or mixed-signal verification using SystemVerilog. Understanding of closed-loop (feedback) control concepts for controlling PIC components (e.g., bias/wavelength locking control loops) and hardware bring-up sequencing. Python or MATLAB for scripting, data analysis, and regression automation.

Understanding of PAM4 link behavior and BER analysis.

📌 System Architect Verification Engineer (Quebec)
🏢 RANOVUS
📍 Quebec