14 Sep
|
Astera Labs
|
Toronto
14 Sep
Astera Labs
Toronto
Astera Labs is seeking a Senior Digital Design Engineer to design high-performance connectivity silicon for AI infrastructure. You will work on PCIe and Ethernet controllers, bridges, and SerDes IP, delivering robust RTL and scalable designs across advanced process nodes.
Join cross-functional teams to translate complex connectivity requirements into production-ready solutions, participate in integration and timing closure, and help accelerate time-to-market for rack-scale AI systems in Canada.
📌 Senior Digital Design Engineer, PCIe/Ethernet IP & SoC (Toronto)
🏢 Astera Labs
📍 Toronto