Elevate your career as a Lead Digital Verification Engineer with Ciena. This role focuses on validating innovative FEC architectures and leading a team in the telecommunications industry. With over 10 years of verification experience, you will develop test plans, validate functional blocks, and mentor junior engineers.
Your communication skills will facilitate collaboration with designers and systems engineers, ensuring high-quality results in a fast-paced setting. Develop functional coverage and verification test plans
- Create components and scenarios using System Verilog UVM and C++ • Bachelor's degree in Electrical or Computer Engineering
- Expertise in C/C++, System Verilog, and simulators
- Drive the future of networking by shaping verification strategies at Ciena.
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📌 Lead Digital Verification Engineer at Ciena (Canada)
🏢 Ciena
📍 Canada
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