- Perform functional verification of high-speed digital circuits using constrained random verification methodology
- Model analog circuits behaviorally and perform mixed-level simulation of analog/digital circuits
- Create product and technical documents
- Prepare project plans and schedules
- Provide technical guidance for verification tasks and resources within project teams
- Collaborate with analog engineers, system engineers, and marketing to ensure designs meet customer and performance requirements
- Work with Validation, Test, and Product Engineers to support end-product validation and qualification
- Provide leadership, guidance, and mentoring to other engineers
- Continuously improve design verification and productivity; review and enhance verification methodology
- Contribute to digital subsystem development across definition, design, verification, and implementation
- Help project teams meet milestones and objectives
- Assist in setting company directions and driving best practices
Requirements
- B.Sc. degree in Electrical or Computer Engineering
- Minimum 5+ years relevant industry experience; preference for more than 7 years
- Expert knowledge in constrained random verification using UVM, OVM, AVM, or VMM methodologies
- Knowledge and/or experience with object-oriented languages; SystemVerilog preferred
- Experience with Python, TCL, Perl, or C
- Working knowledge of PC and Unix/Linux operating systems
- Knowledge of digital verification methods
- Robust analytical and problem-solving skills
- Excellent verbal and written communication skills
- Ability to work independently and in a team environment
- Excellent interpersonal and team skills
- Self-motivated and creative
- Well organized, thorough, and detail oriented
- Ability to multitask and prioritize multiple simultaneous responsibilities
Core Competencies
Demonstrates expertise in constrained random verification methodologies, particularly using UVM, OVM, AVM, or VMM, alongside strong skills in digital verification methods and object-oriented programming with SystemVerilog. Capable of providing leadership and technical guidance while collaborating effectively with cross-functional teams to meet project milestones.
Highest-signal resume keywords
- Constrained Random Verification
- UVM Methodology
- SystemVerilog Programming
- Digital Verification Methods
- Project Leadership
ATS Optimization Keywords
Hard Skills
- Constrained Random Verification
- UVM Methodology
- SystemVerilog Programming
- Python Programming
- TCL Programming
- Perl Programming
- C Programming
- Digital Verification Methods
- Mixed-Level Simulation
- Analog Circuit Modeling
Soft Skills
- Analytical Skills
- Problem-Solving Skills
- Verbal Communication Skills
- Written Communication Skills
- Interpersonal Skills