Step into a pivotal role as a Senior FPGA Design Engineer with a leading technology organization. Take full ownership of FPGA designs from specifications to implementation, leveraging SystemVerilog expertise. This position is crucial for those with 10-15 years of hands-on FPGA design experience. You will transform specifications into robust micro-architectures, ensuring reliable implementations and timing closure.
Your responsibilities include CDC analysis and guaranteeing synchronization across domains, aligning with complex design requirements. Key Responsibilities:
- Design FPGA logic using SystemVerilog efficiently
- Translate specifications into production-quality architectures
- Own designs throughout the complete development lifecycle
- Develop timing-clean FPGA implementations
- Analyze and manage Clock Domain Crossings effectively Requirements:
- 10–15 years of practical FPGA design experience
- Robust experience in SystemVerilog development
- Proven ability in complex design ownership
- Practical knowledge of Clock Domain Crossing analysis
- Experience with FPGA synthesis tools management Bring your expertise in FPGA design and timing analysis to lead transformative projects.