Qualcomm Canada ULC is seeking ASIC design and verification engineering interns to contribute to design, verification, and modelling of HW IP blocks for ML applications. Under supervision, you will gain hands-on experience across SystemVerilog, SystemC, and Python, learning multiple phases from specification to post-silicon debug.
Candidates must be enrolled in a bachelor’s or master’s program in CS/EE and available for a 16‑month internship (May 2027 – Aug 2028). Housing stipend provided.