Ip Validation Design Lead - Post-Silicon & Debug (Winnipeg)

Ip Validation Design Lead - Post-Silicon & Debug (Winnipeg)

09 Sep
|
AMD
|
Winnipeg

09 Sep

AMD

Winnipeg

Lead IP validation design for AMD's next-gen hardware, focusing on processor architecture and digital design. Drive innovation, define test plans, and debug issues for SOC programs.

📌 Ip Validation Design Lead - Post-Silicon & Debug (Winnipeg)
🏢 AMD
📍 Winnipeg

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