Advance your FPGA design career with an experienced role in Ottawa. As an FPGA Design Engineer, you will own full-cycle designs and collaborate with multiple teams to deliver high-quality solutions.

This full-time, on-site position is ideal for an experienced FPGA engineer aiming for stability while striving for growth into a Design Prime role. You will design and implement using SystemVerilog and manage various aspects of the synthesis flow, ensuring robust, production-ready solutions.

Key Responsibilities: • Design FPGA logic using SystemVerilog for implementation • Manage Clock Domain Crossings (CDC) with verification strategies • Own FPGA synthesis flow and timing closure processes • Analyse timing and synthesis reports for issue resolution • Collaborate with cross-functional teams for design readiness

Requirements: • 10-15 years of hands-on FPGA design experience • Strong experience with SystemVerilog and CDC analysis • Proficient in configuring FPGA synthesis tools • Solid understanding of SDC timing constraints • Ability to work full-time in office in Ottawa

Contribute your expertise in FPGA design to deliver innovative solutions within a talented team in Ottawa. #J-18808-Ljbffr

📌 FPGA Design Engineer in Ottawa (Montreal)
🏢 European Recruitment
📍 Montreal