Elevate your career as a Senior SoC Design Engineer with Microchip in Burnaby, BC. This role focuses on designing complex digital circuits and collaborating with a agile engineering team.

In this key position within Microchip's Data Center Solutions unit, you will design integrated circuits using Verilog and contribute to both emulation and ASIC lab validation. Your expertise will support communication with architects and the design team to address technical challenges while implementing cutting-edge technology in storage and AI applications.

Key Responsibilities:
Design complex digital integrated circuits in Verilog
Define feature sets and produce engineering documentation
Support ASIC lab validation and logic modifications




Collaborate with design and verification teams across locations
Justify design decisions and communicate with architects

Requirements:
Bachelor's or Master's in Electrical/Computer Engineering
3 to 5 years of RTL Design experience
Familiarity with ASIC design flows and verification tools
Scripting skills in languages like Python and TCL
Knowledge of PCI-Express and low power designs

Drive innovation in digital circuit design and enhance your skills in a supportive setting at Microchip.
J-18808-Ljbffr

📌 Senior Soc Design Engineer At Microchip Burnaby
🏢 FHLB Des Moines
📍 Burnaby