Become a Lead ASIC Verification Engineer at Synopsys, focusing on high-performance HBM solutions. Take on challenges that drive the future of AI and computing technology.In this role, you will lead verification processes for ASIC designs, employing advanced methodologies. With a solid background in digital verification and at least 10 years of experience, you will be instrumental in ensuring product reliability and quality. Your ability to mentor junior engineers and contribute to team success will be valued in this collaborative workplace.Key Responsibilities:
Develop thorough verification plans for next-generation HBM products
Write advanced test cases using SystemVerilog and UVM
Analyze and debug complex design and testbench issues




Automate verification workflows with Python or Perl
Participate in code reviews and mentor team membersRequirements:
Master’s or Bachelor’s in Electrical Engineering
10+ years of experience in digital design/verification
Proven capability in SystemVerilog and UVM
Excellent analytical and debugging skills
Robust teamwork and communication skillsJoin Synopsys and lead initiatives that push the boundaries of digital verification and enhance silicon quality.#J-18808-Ljbffr

📌 Lead Asic Verification Engineer Hbm Focus Ottawa
🏢 Synopsys
📍 Ottawa