Job Description
We are seeking a highly motivated Design Verification Engineer with a relentless drive to excel and make a significant impact.

Our team offers innovative thinking, engineering expertise, and sustained market leadership in embedded processing.

By joining us, you will work with the advanced platforms that NXP delivers to major players in the automotive, industrial, edge, and telecommunication markets, featuring multiple processing cores and high-performance networking accelerators integrated on the same silicon chip.

Responsibilities: Architect, design, implement, and verify breakthrough Ethernet/networking IP to be integrated into next-generation SoCs for automotive, industrial, and edge computing markets.

Responsible for the architecture, design, and implementation of UVM Verification of hardware IP & System on Chip (SoC) products.

Perform thorough trade-off analysis on performance and complexity.

Work closely with IP architecture, design, and verification teams on planning and execution to ensure the IP is delivered on time and with the highest quality.

Produce quality documentation for all phases of the project, including detailed IP functional and implementation specifications.

Build the directed and random verification tests
Debug test failures to determine the root cause; work with architect and design engineers to resolve defects and correct issues
Review functional and code coverage metrics – modify or add tests or constrain random tests to meet the coverage requirements
Proactively drive continuous improvement in design and verification methodology.

Artificial intelligence tools are used to assist in screening and assessing applicants
for this position.

This is a recent opening, looking to add additional headcount to the existing team.

We are a company committed to creating diverse and inclusive environments where people can bring their full, authentic selves to work every day.





We are an equal opportunity/affirmative action employer that believes everyone matters.

Qualified candidates will receive consideration for employment regardless of their race, color, ethnicity, religion, sex (including pregnancy), sexual orientation, gender identity and expression, marital status, national origin, ancestry, genetic factors, age, disability, protected veteran status, military or uniformed service member status, or any other status or characteristic protected by applicable laws, regulations, and ordinances.

If you need assistance and/or a reasonable accommodation due to a disability during the application or recruiting process, please send a request to [email protected].

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Skills and Requirements
-10+ years of experience in IP & System on Chip (SoC) products.
-Thorough knowledge and expertise in System Verilog and UVM Verification.
-Strong understanding of IP & SoC development methodology and proficiency in verification tools.
-Strong Experience in EDA tools and scripting (Python, TCL, Perl, Makefile, Shell) used to build tools and flows for verification environments
-Strong Experience in architecting and implementing Design Verification infrastructure and executing the full verification cycle
-Experience with revision control systems like Git
-Familiarity with hardware and software implementation trade-offs.
-Focus on quality results with proven problem-solving abilities.
-Algorithm development experience.
-Bachelor's degree in Computer Science, Engineering, or a related field. -Familiarity with Formal and Functional Safety Verification.
-Knowledge of state-of-the-art networking technologies, including TCP/IP protocols.
-Experience with data products such as routers, bridges, and switches.
-Security/cryptography experience.

📌 Principal IC Design Verification Engineer (Kanata)
🏢 Insight Global
📍 Kanata