06 Sep
|
Synopsys
|
Winnipeg
Synopsys, Inc. in Ontario, Canada, is seeking an enthusiastic ASIC Digital Design Verification Engineer to design and implement verification environments for Interface IP protocols, collaborate with design and architecture teams, and drive coverage and bug fixes. You will mentor junior verification engineers, conduct design and verification reviews, document specifications and test plans, and apply SystemVerilog, UVM, SVA, and scripting skills to deliver high-quality silicon.
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📌 Lead ASIC Verification Engineer: Digital IP & UVM Expert (Winnipeg)
🏢 Synopsys
📍 Winnipeg