06 Sep
|
Socket.dev
|
Winnipeg
06 Sep
Socket.dev
Winnipeg
Elevate your career with Intel as a Mixed Signal Design Verification Engineer! This role focuses on verifying cutting-edge mixed signal components and requires expertise in SystemVerilog and Verilog.
As a vital team member, you will contribute to the reliability and performance of Intel's mixed signal designs. Ideal candidates will have a Bachelor's in Electrical Engineering or related fields and at least one year of design verification experience. You will collaborate with cross-functional teams, driving innovation in verification methodologies.
Key Responsibilities:
• Develop and execute verification plans for mixed signal components • Build and maintain test benches to validate functionalities • Create analog behavioral models for pre-silicon bug identification • Collaborate with architects to optimize verification flows • Perform technical reviews of test plans for accuracy
Requirements: • Bachelor’s degree and 1+ years of design verification experience • Proficient in SystemVerilog and debugging pre-silicon issues • Solid problem-solving skills for design challenges • Experience with Python for automation • Knowledge of OVM and UVM methodologies
Bring your expertise in mixed signal design verification to help Intel innovate! #J-18808-Ljbffr
📌 Mixed Signal Verification Engineer at Intel (Winnipeg)
🏢 Socket.dev
📍 Winnipeg