Cadence Design Systems is seeking a Design Engineer II to join a energetic team in Montreal, Ottawa, and Toronto. The role focuses on verification of digital RTL and development of reusable verification environments within a high-performance IP context. Collaboration across design, verification, and project management teams across global sites is essential.
The candidate should have a B.S. in EE/CPE/CSC, strong SV/UVM knowledge, and experience with scripting (Python).
📌 Digital Verification Engineer II — High-Impact IP (Montreal)
🏢 Cadence Design Systems
📍 Montreal
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