Senior Asic Design Engineer – Verilog/Ppa Expert - C$150,000 - C$250,000 A Year (Varennes)

Senior Asic Design Engineer – Verilog/Ppa Expert - C$150,000 - C$250,000 A Year (Varennes)

05 Sep
|
Semiconductor Startup
|
Varennes

05 Sep

Semiconductor Startup

Varennes

Seeking an ASIC Design Engineer for a Canadian startup to design digital circuits for optical transceivers, optimize performance, and integrate designs with teams. Requires Verilog/System Verilog proficiency.

📌 Senior Asic Design Engineer – Verilog/Ppa Expert - C$150,000 - C$250,000 A Year (Varennes)
🏢 Semiconductor Startup
📍 Varennes

Reply to this offer

Impress this employer describing Your skills and abilities, fill out the form below and leave Your personal touch in the presentation letter.

Subscribe to this job alert:

Get the latest job offers by email for: senior asic design engineer – verilog/ppa expert - c$150,000 - c$250,000 a year (varennes) / varennes