Elevate your career at TSMC Design Technology Canada as a Senior Memory Layout Engineer in Kanata, Ontario. Dive into advanced custom layout design and cutting-edge circuit R&D.;

In this senior role, you will engage in high-performance memory layout design, focusing on cutting-edge CMOS/FinFET processes of 5nm and below. The successful candidate will bring exceptional skills in layout estimation, planning, and coordination while utilizing advanced CAD tools. Your experience will contribute to critical projects that redefine semiconductor technologies.

Key Responsibilities:
• Execute advanced custom layout implementing IC design
• Develop high-speed and high-density memory compilers
• Utilize CAD tools for layout, DRC, LVS, and extraction




• Achieve compact memory layouts including Memory Arrays and Periphery
• Lead verification and documentation of memory circuits

Requirements:
• Bachelor’s or master’s in Computer Science or related field
• 8+ years in semiconductor memory layout design
• Expertise in advanced FinFET nodes and memory layout design
• Proficiency in design and verification tools like Calibre
• Familiarity with scripting languages such as TCL

Bring your expertise in memory layout and CAD tools to TSMC, making impactful contributions to creative semiconductor solutions.
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📌 Senior Layout Engineer at TSMC (Quebec City)
🏢 TSMC
📍 Quebec City