Senior Asic Design Engineer, Low Power Audio Ai Subsystems - $104,900 - $154,900 A Year (Winnipeg)

Senior Asic Design Engineer, Low Power Audio Ai Subsystems - $104,900 - $154,900 A Year (Winnipeg)

04 Sep
|
Qualcomm Canada ULC
|
Winnipeg

04 Sep

Qualcomm Canada ULC

Winnipeg

CompanyQualcomm Canada ULCJob AreaEngineering Group, Engineering Group > ASICS EngineeringGeneral SummaryWhat we are doing has not been done. Shape the future of low power AI subsystems. Push the boundaries on features and performance. Qualcomm Technologies Audio products are designed to offer premium wireless connectivity, high levels of integration, immersive sound quality, and on-device AI for smart audio and context aware applications. An ultra‑low power subsystem within a low power SoC; a chip‑within‑a‑chip HWblock incorporating multiple always‑on IP's, design execution within this group requires solving ground‑breaking challenges and multiple power domain crossing issues. As we deliver to the premium tiers of the mobile, compute, automotive, and IoT markets, we strive to pioneer new and/or improved functionality and innovate to minimize power consumption. Make a difference, join a team on the cutting edge and become an integral part of Qualcomm’s growth and momentum. We are looking for an ASIC Design Engineer that will work with industry leading edge HW Design technology and processes and provide expertise for next generation initiatives. As a leader in delivering ultra‑low power solutions, there will also be an emphasis on power analysis and optimization. Replacement position.ResponsibilitiesDevelop micro‑architecture and module specifications for digital audio and AI IP blocks including those that interface with the SoCImplement modules and sub‑systems and integrate IP from other teams in Verilog RTLAnalyze performance, area, power,



and system cost tradeoffs for different implementationsReview opportunities for power optimization for ultra‑low power designsPower projection activities, what/if scenario explorationWork with the design verification team to debug tests at the module, sub‑system and SoC levels throughout the ASIC development cycle (pre and post‑silicon)Work with the implementation team to review synthesis results, review power metrics and reach static timing closureAnalysis with silicon debug team to correlate stated objectives for both function and powerMinimum Qualifications2+ years of professional industry ASIC hardware design and/or implementation experience.Verilog/VHDL RTL design languages and ability to write clean, readable, synthesizable RTL.Understanding of ASIC/VLSI conceptsExperience in logic synthesis using Synopsis and/or Cadence tools.Ability to work legally in CanadaPreferred QualificationsExperience with power analysis, power modeling and low power RTL design.Experience with clock domain crossing techniquesPower and performance experience with an audio IP core, DSP, various audio interfaces (I2S, PCM, SLIMbus, SoundWire, Audio Codec) and accelerators (low‑power AI/ML inference).Experience with a subset of DC, FC, PTPX, Power Compiler, Primetime, Modeltech, VCS, power theatre, etc.Experience with design rule check (Spyglass, etc.), Formal verification (Formality, LEC, etc.)



and/or Power analysis and simulationScripting skills (Python, PERL, TCL or C)Knowledge of bus interface protocols (APB, AHB, AXI)Experience with post‑silicon debugExperience with UVMC codingEducation & ExperienceBachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, or related work experience.Master's degree in Science, Engineering, or related field and 1+ years of ASIC design, verification, or related work experience.PhD in Science, Engineering, or related field.Equal Opportunity and AccommodationsApplicants: Qualcomm is an equal prospect employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e‑mail disability‑[email protected] or call Qualcomm's toll‑free number. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities.Pay Range and Other Compensation & Benefits$104,900.00 - $154,900.00. The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. While salary is only one component of total compensation at Qualcomm, we also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants. In addition, our highly competitive advantages package is designed to support your success at work, at home, and at play.#J-18808-Ljbffr

📌 Senior Asic Design Engineer, Low Power Audio Ai Subsystems - $104,900 - $154,900 A Year (Winnipeg)
🏢 Qualcomm Canada ULC
📍 Winnipeg

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