Elevate your career as a Memory Layout Engineer with expertise in TSMC technologies for high-performance semiconductor designs. This role emphasizes memory layout development, physical verification, and integration on advanced node processes.Your expertise in memory layout design will allow you to tackle complex challenges in optimizing layouts for critical memory components. Engage in top-level integration while ensuring compliance with physical verification standards. Collaborate effectively with design teams to enhance performance and quality throughout the layout process.Key Responsibilities:Implement custom designs for memory block layoutsOptimize critical components including SRAM architectureDrive top-level memory integration and assemblyExecute verification checks and ensure layout integrityManage IR drop and Electromigration analysis effortsRequirements:Degree in Electrical/Electronics Engineering or related fieldExperience with advanced memory layout designsHands-on work with TSMC 7nm technologyFamiliarity with leading layout verification toolsStrong analytical and debugging capabilitiesLeverage your expertise in advanced memory design and contribute to cutting-edge semiconductor solutions.