Take on a pivotal role at Altera as an FPGA Development Engineer focusing on synthesis in Toronto, Ontario. Your expertise in RTL design will directly enhance FPGA compilation technology.

As part of the Synthesis team, you'll be developing and optimizing algorithms to transform RTL into productive hardware implementations. This position demands a blend of over 6 years in FPGA/ASIC design experience alongside robust proficiencies in Verilog or VHDL, combining hardware knowledge with software engineering capabilities.

Key Responsibilities
Implement and enhance synthesis algorithms for RTL designs
Improve the overall FPGA compiler flow through integration
Drive optimizations in performance, power, and area
Create tools for analyzing complex RTL systems
Collaborate with architecture and validation teams for tool alignment

Requirements
6+ years experience in FPGA/ASIC or related domains
Solid experience with Verilog, SystemVerilog, or VHDL
Proficient in C/C++ for EDA tools
Understanding of timing analysis and optimization
Degree in Electrical, Computer Engineering, or similar

Champion FPGA innovations at Altera, shaping the future of synthesis technology.

📌 Altera Fpga Development Engineer Synthesis Toronto
🏢 191 Altera
📍 Toronto