02 Sep
|
Cerebras Systems
|
Lower Sackville
02 Sep
Cerebras Systems
Lower Sackville
Take your FPGA development skills to Cerebras Systems, the leader in AI chip technology. Contribute to cutting-edge IO path implementations and elevate AI applications with optimized performance. As an FPGA Engineer, you will play a critical role in enhancing the Host and Network IO Team's architecture.
Collaborating with AI application-level teams and software experts, your key focus will be on bandwidth and latency optimization for distributed systems. This role demands advanced proficiency in Verilog and a solid background in FPGA solutions across multiple hardware generations. Key Responsibilities:
- Lead IO architecture design for chassis-to-wafer systems
- Improve RTL and implement next-gen FPGA designs
- Produce deployment-ready bitstreams for large AI clusters
- Collaborate with DV teams to ensure debug efficiency
- Optimize FPGA datapath bandwidth and latency Requirements:
- 5+ years in FPGA solutions or Master’s/PhD with 3 years
- Strong Verilog development proficiency
- Experience with network protocols (TCP, RoCE)
- Familiarity with network switch environments
- Effective cross-team communication skills Embrace the unique opportunity to revolutionize AI technology as a FPGA Engineer at Cerebras Systems.
📌 Cerebras FPGA Engineer for AI Innovations (Lower Sackville)
🏢 Cerebras Systems
📍 Lower Sackville