Engage in cutting-edge ASIC design with Celero Communications as a Digital ASIC Design Engineer. Leverage your skills in DSP and Verilog to drive innovation in high-speed optical technology.

Celero

Communications is on the lookout for a Digital ASIC Design Engineer to contribute expertise in advanced ASIC development. The ideal candidate will possess extensive digital ASIC design experience, particularly with DSP and mixed-signal design methodologies. You will collaborate closely with multiple teams to advance high-performance optical communication technologies through cutting-edge design and implementation. Key Responsibilities:

- Design high-performance digital circuits and ASIC blocks
- Develop DSP and digital communication functionalities




- Collaborate with SerDes and Analog teams for mixed-signal ASICs
- Perform synthesis and timing analysis for ASIC signoff
- Optimize designs for power, performance, and area Requirements:
- Bachelor's degree in Electrical or Computer Engineering
- 5+ years of digital ASIC design experience
- Proficiency in Verilog and SystemVerilog
- Hands-on with ASIC design flows and EDA tools
- Strong knowledge of DSP and SerDes technologies Shape the future of optical communications with your expertise in ASIC design at Celero.

📌 Digital ASIC Design Engineer at Celero (Quebec)
🏢 CELERO COMMUNICATIONS
📍 Quebec