Job DescriptionThe Architecture Co-Verification team (ACOV) is an exciting, fast paced team responsible for enabling HW/FW development and co-verification of state-of-art System-On-Chip (SoC) devices using industry leading HW emulators (such as Cadence Palladium and Protium). The team is deployed in all aspects of SoC development phases from architectural exploration to post-silicon validation, HW/FW co-development, pre-silicon functional co-verification, pre/post-silicon performance testing, power analysis, and critical post-silicon investigations.This Role Is Perfect For You If YouThrive in a fast-paced, technically challenging environmentLove solving complex system-level problems that span both hardware and firmwareEnjoy working with state-of-the-art emulation and FPGA platformsWant to build broad, deep expertise and high visibility across the organizationResponsibilities (But Are Not Limited To The Following)Port complex SoC RTL designs onto leading hardware emulators and FPGA platformsDesign and develop emulation-specific hardware to enable robust pre-silicon subsystem and full-system co-verificationBuild a scalable, common test ecosystem that bridges pre-silicon and post-silicon environmentsDevelop firmware and test content for system-level hardware/firmware co-verificationDebug and resolve challenging issues in embedded multi-core, real-time systems running on emulatorsLeverage advanced protocol analyzers for deep-dive analysis, error injection, and performance optimizationTrack verification progress and product quality using industry-standard test and defect management toolsClearly communicate technical findings and solutions to engineering teamsRequirements/QualificationsBS/MS degree or higher in Electrical/Electronic Engineering, Computer Engineering, or a related field5+ years of relevant work experience in hardware/firmware development or verificationHands-on experience with one or more serial storage protocols (SAS, SATA, or NVMe)



and strong knowledge of PCIeSolid understanding of server and storage system architectures, including Windows and Linux host driver modelsProficient Linux user with strong programming and scripting skills in C, Python, Tcl, and BashStrong digital design and RTL coding experience using Verilog, SystemVerilog, or VHDLExperience creating and managing system validation test schedules and executing them effectivelyGood knowledge of processor architectures such as MIPS, ARM, or RISC-V, including JTAG, I2C, and firmware developmentDemonstrated ability to learn quickly in a fast-paced environment and a proactive, organized self-starter mindsetDesired SkillsExcellent analytical, documentation, problem-solving, and communication skillsPrior experience with hardware emulation (Cadence Palladium, Protium, or similar) is a strong assetExperience with RAID HBAs, SAS Controllers, and associated software testing strategiesFamiliarity with test automation frameworks, testing methodologies, and test toolsStrong debugging skills in embedded multi-core real-time systemsKnowledge of Embedded Linux and RTOS concepts (processes, threads, scheduling, synchronization, and memory management)Experience with Cadence emulation infrastructure and process flows is highly desirableHighly motivated team player who can drive personal and team goalsTravel Time0% - 25%Pay RangeWe offer a total compensation package that ranks among the best in the industry. It consists of competitive base pay, restricted stock units, and quarterly bonus payments. In addition to these components, our package includes health perks that begin day one, retirement savings plans, and an industry leading IESPP program with a 6-month look back feature. Find more information about all our benefits at the link below:Benefits of working at MicrochipThe annual base salary range for this position is $86,000-$186,000.*Range is dependent on numerous factors including job location, skills and experience.#J-18808-Ljbffr

📌 Senior Design Engineer- Emulation - $86,000 - $186,000 A Year (Winnipeg)
🏢 Microchip
📍 Winnipeg