Join the Qualcomm team as a Memory Subsystem Verification Engineer to shape cutting-edge digital designs. This role emphasizes advanced verification methods for high-performance memory controllers.

At Qualcomm

Canada ULC, the selected engineer will develop and execute verification strategies for complex memory designs such as DDR and HBM interfaces. Candidates must possess robust skills in Verilog and UVM, as well as a thorough understanding of memory technologies. Your contributions will directly impact design accuracy and performance. Key Responsibilities:
Develop comprehensive verification strategies for RTL designs
Enhance and maintain UVM and formal verification frameworks
Conduct constrained-random and corner-case testing




Write SystemVerilog Assertions for validation of protocols
Drive functional and code coverage closure across projects Requirements:
Bachelor’s or Master’s degree in a technical field
3–10 years experience in design verification for ASIC or SoC
Expertise in Verilog, SystemVerilog, and UVM methodologies
Proven ability in developing reusable verification environments
Solid analytical and problem-solving capabilities Leverage your expertise in memory subsystem verification to advance Qualcomm's state-of-the-art digital designs.

📌 Memory Subsystem Verification Engineer Vancouver
🏢 Qualcomm
📍 Vancouver