Overview Company: Qualcomm Canada ULCJob Area: Engineering Group, Engineering Group > ASICS EngineeringGeneral Summary:QUALCOMM is the world's leading developer of next-generation wireless and multimedia technology. We are searching for an ASIC design engineer interested in developing world-class solutions for the next generation of AI/ML HW IP. New PositionMinimum QualificationsBachelors degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.OR Masters degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.OR PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.Principal DutiesDevelop of Micro-Architecture and specification based on high level design requirementsDevelop RTL design that meets required performance and is optimized for Area and PowerIntegrate pre-verified sub-IPs to build up larger functionalityFlow bring up and report analysis for Linting, RTL Synthesis, CLP, CDCWork closely with verification team to define testplan, debug regression, analyze coverage reportsDevelop SVA assertions for white box verification for formal verificationEffective communication across teams, multitasking and well-planned execution of the tasks.Preferred QualificationsPrior experience delivering Verilog and System Verilog RTLDetail oriented with solid analytical and debugging skillsStrong communication (written and verbal), collaboration, and specification skillsPracticed design knowledge working with some of the following concepts:Clock domain crossing and reset architectureMachine Learning HW developmentFIFOsimplementationBusimplementation/verificationtechniquesMemory selection and controlHigh speed and low power design optimizationBus interface protocols (AHB,



AXI)Experience with some of the followingSimulation and code coverage tools (VCS, Verdi, Modeltech/Questa, or Xcelium)Design rule and CDC checking (SVA assertions, Spyglass, 0-in, etc.)Scripting languages (PERL, Python, TCL, C, etc.)Power Intent and Analysis: UPF, CLP, PTPX, PowerProSynthesis: DCG/NXT, FCStatic Timing: PrimetimeFormal Verification: Conformal, FormalityMinimum QualificationsLegally permitted to work on-site in Canada5+ years of ASIC design, verification, or related work experience.Applicants: Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, Qualcomm is committed to providing an accessible process. You may e-mail [email protected] or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities.Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.Pay range and Other Compensation & Benefits:$124,200.00 - $174,200.00The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants. Our benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer.If you would like more information about this role, please contact Qualcomm Careers.#J-18808-Ljbffr

📌 Staff Machine Learning Asic Design Engineer - $124,200 - $174,200 A Year (Markham)
🏢 Qualcomm
📍 Markham