Become a pivotal member of Qualcomm Canada's verification team as a Design Verification Engineer. Focus on robust verification methodologies for advanced digital memory subsystems in a collaborative workplace.
This role invites engineers with a strong background in Verilog and SystemVerilog to contribute to the development and execution of verification plans. You'll engage in the entire verification process—from creating testbenches in UVM to driving functional and code coverage closure. Your role is essential in ensuring the reliability of high-performance digital designs and memory interfaces.
Key Responsibilities:
• Build verification strategies for complex RTL memory designs
• Maintain and enhance UVM-based verification environments
• Develop error-injection and corner-case testing strategies
• Conduct root-cause analysis for verification failures
• Collaborate with engineering teams on design accuracy
Requirements:
• Bachelor's degree in Electrical Engineering or similar
• 2-10 years in ASIC design or verification
• Hands-on experience with UVM and SystemVerilog
• Knowledge of memory technologies and integration processes
• Strong communication and collaboration aptitude
Leverage your design verification skills to make significant contributions at Qualcomm Canada and innovate in memory technologies!
#J-18808-Ljbffr