Seeking an RTL Design Engineer to enhance AI model training for chip design. Responsibilities include designing RTL components, developing ASIC design flows, and collaborating with teams using EDA tools. Requires Verilog/SystemVerilog and UVM proficiency.
📌 Rtl Design Engineer - Ai Tools - $100 - $150 An Hour - Remote (Toronto)
🏢 Mercor
📍 Toronto
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