27 Aug
|
CELERO COMMUNICATIONS
|
Quebec City
27 Aug
CELERO COMMUNICATIONS
Quebec City
Become an integral part of Celero Communications by working as an ASIC Design Engineer. Design high-performance circuits and ASIC blocks using Verilog and SystemVerilog in a fast-paced startup setting.
At Celero Communications, you will be at the forefront of semiconductor innovation, architecting complex ASIC designs while collaborating with cross-functional teams. Your role will focus on integrating DSP, digital communication, and high-speed SerDes functionalities into sophisticated optical communication systems. You'll engage in various design reviews, simulations, and performance optimizations throughout product development.
Key Responsibilities:
• Design high-performance digital circuits and ASIC blocks
• Integrate DSP and digital communication in ASIC designs
• Collaborate with teams for mixed-signal ASIC development
• Perform synthesis, timing analysis, and verification tasks
• Develop automation scripts for design efficiency
Requirements:
• Bachelor's or higher in Electrical Engineering or related field
• 5+ years of digital ASIC design experience
• Proficient in Verilog and SystemVerilog
• Knowledge of DSP, SerDes, and optical communications
• Experience with industry-standard EDA tools
Contribute your expertise in ASIC design and digital signal processing to power the next generation of AI and data infrastructure at Celero.
#J-18808-Ljbffr
📌 ASIC Design Engineer at Celero Communications (Quebec City)
🏢 CELERO COMMUNICATIONS
📍 Quebec City