Join the Qualcomm team as a Memory Subsystem Verification Engineer to shape cutting-edge digital designs. This role emphasizes advanced verification methods for high-performance memory controllers.At Qualcomm Canada ULC, the selected engineer will develop and execute verification strategies for complex memory designs such as DDR and HBM interfaces. Candidates must possess solid skills in Verilog and UVM, as well as a thorough understanding of memory technologies.



Your contributions will directly impact design accuracy and performance.Key Responsibilities:Develop comprehensive verification strategies for RTL designsEnhance and maintain UVM and formal verification frameworksConduct constrained-random and corner-case testingWrite SystemVerilog Assertions for validation of protocolsDrive functional and code coverage closure across projectsRequirements:Bachelor's or Master's degree in a technical field3–10 years experience in design verification for ASIC or SoCExpertise in Verilog, SystemVerilog, and UVM methodologiesProven ability in developing reusable verification environmentsStrong analytical and problem-solving capabilitiesLeverage your expertise in memory subsystem verification to advance Qualcomm's state-of-the-art digital designs.#J-18808-Ljbffr

📌 Memory Subsystem Verification Engineer (Vancouver)
🏢 Qualcomm
📍 Vancouver