Fpga Design Engineer - $75 - $78 An Hour (Varennes)

Fpga Design Engineer - $75 - $78 An Hour (Varennes)

25 Aug
|
Stefanini Group
|
Varennes

25 Aug

Stefanini Group

Varennes

Develop FPGA IP architecture, implement RTL blocks, and validate designs for 4G/5G radio units, collaborating with development teams.

📌 Fpga Design Engineer - $75 - $78 An Hour (Varennes)
🏢 Stefanini Group
📍 Varennes

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