Elevate your career as a Design Verification Engineer at Qualcomm Canada ULC, focusing on memory subsystem verification. Contribute expertise in developing dynamic verification strategies for advanced digital designs.This role requires a motivated engineer to join Qualcomm's memory subsystem verification team. You will devise comprehensive verification strategies and test plans for complex digital designs, including memory controllers and custom interfaces. Successful candidates should possess hands-on experience with Verilog, SystemVerilog, and memory technologies,



ensuring thorough and accurate design validation.Key Responsibilities:Develop test plans and coverage strategies for RTL designsBuild and enhance reusable verification environments using UVMCreate and execute various test types including error-injection testsAnalyze simulation failures and perform root-cause analysisCollaborate with cross-functional teams for issue resolutionRequirements:Bachelor's or Master's degree in Engineering or related field3–10 years experience in ASIC or SoC verificationStrong knowledge in Verilog, SystemVerilog, UVMProficiency in developing UVM components for verificationSolid understanding of digital design and simulation methodsUtilize your digital design verification skills to contribute to Qualcomm's creative projects in the memory subsystem domain.#J-18808-Ljbffr

📌 Design Verification Engineer At Qualcomm (Vancouver)
🏢 Qualcomm
📍 Vancouver