Are you an Analog Design Engineer passionate about building the high-speed interconnect technology powering the next generation of AI? Join our fast-growing semiconductor startup and help develop disruptive mixed-signal solutions that enable tomorrow's AI infrastructure. We are seeking experienced Analog Design Engineers to architect, design, and deliver high-performance analog and mixed-signal circuits for next-generation transceivers and other critical high-speed functions. This is an opportunity to work alongside a world-class engineering team, tackle challenging design problems in advanced process technologies, and make a direct impact on innovative products from architecture through silicon.LocationsIrvine, CA (HQ) | San Jose, CA | Vancouver, BC | Ottawa, ONWhat You Will DoHigh speed analog circuit design, such as high-speed broadband amplifiers (VGA, CTLE, DRV, etc.)Clock generation and distribution (VCOs, PLL, clock distribution, etc.)Fundamental analog blocks (bandgap references, LDOs, temp sensors, etc.)Current techniques for the development of next generation optical transceiverDesign of custom passive components,



from concept to silicon implementationSupervise analog layouts within advanced process nodesSystem verification and circuit design spec creationSilicon bring-up, debug and supportTeam communication and documentationWhat You Will BringMaster's degree and/or PhD in Electrical Engineering or related fields with 5+ years of experienceShould have strong analog design fundamentals and experience in designing analog circuit blocks for broadband amplification, clock generation and distribution, and/or fundamental analog blocksExperience with analog design and verification tools (Virtuoso, Spectre, ADE, and post layout extraction tools) is a mustExperience in advance CMOS design and verification flows (tools to evaluate self-heating, electromigration, safe operating area)Experience with electromagnetic simulation tools (EMX, Momentum, HFSS or other) is a plusKnowledge of the fundamentals on electromagnetism, lump models, and high frequency designGood understanding of analog layouts in FinFET and its effect on high-speed designs is a plusStrong communication and documentation skills#J-18808-Ljbffr

📌 Principal Analog Design Engineer (Ottawa)
🏢 Socket.dev
📍 Ottawa