Lightmatter seeks a Senior ASIC Physical Design Engineer to shape the future of AI infrastructure. Utilize your deep expertise in 3nm design to propel cutting-edge solutions in the photonics landscape.
This role is for an experienced engineer who thrives on solving complex problems and innovating in digital block implementation. You'll leverage advanced knowledge in power integrity and timing closure while collaborating with top-tier scientists and engineers. This position not only offers the chance to drive impactful projects but also to define the future of computing technology.
Key Responsibilities:
• Lead implementation of advanced digital blocks
• Ensure full-chip timing closure and DRC/LVS accuracy
• Analyze power and optimize for performance and area
• Execute layout and IO placement design responsibilities
• Collaborate with EDA companies to troubleshoot tools
Requirements:
• Bachelor’s degree in Electrical or Computer Engineering
• Over 12 years in physical design roles
• Proven experience with ASIC tape-outs
• Skilled in scripting languages like TCL and Python
• In-depth knowledge of timing and physical verification
Help pave the way for groundbreaking innovations at Lightmatter, redefining the capabilities of AI data centers.
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