Advance your skills as a Digital Verification Engineer at SiTime in Ottawa. Play an essential role in the verification of innovative mixed-signal Digital PLL circuits while enhancing test methodologies.

SiTime is looking for a dedicated Digital Verification Engineer to join its Ottawa team. This position is a vital part of our development process for advanced mixed-signal Digital PLLs. You will focus on creating verification plans and utilize up-to-date methodologies to enhance our verification environment while working closely with design teams.

Key Responsibilities:



• Develop and execute self-checking test cases • Contribute to evolving verification infrastructure • Triage and debug RTL and Gate-level simulations • Collaborate with diverse team members locally and remotely • Work towards achieving verification closure efficiently

Requirements: • Proficiency in creating detailed verification plans • Knowledge of SystemVerilog and UVM is essential • Experience with Synopsys and/or Cadence simulations • Familiarity with assertions and coverage methods • Ability to operate within a Unix/Linux environment

Play a pivotal role in SiTime's innovative engineering efforts and help shape the future of precision timing. #J-18808-Ljbffr

📌 Digital PLL Verification Engineer at SiTime (Montreal)
🏢 Socket.dev
📍 Montreal