Elevate your career as a Design Verification Engineer at Qualcomm Canada ULC, focusing on memory subsystem verification. Contribute expertise in developing dynamic verification strategies for advanced digital designs.

This role requires a motivated engineer to join Qualcomm’s memory subsystem verification team. You will devise comprehensive verification strategies and test plans for complex digital designs, including memory controllers and custom interfaces. Successful candidates should possess hands-on experience with Verilog, SystemVerilog, and memory technologies, ensuring thorough and accurate design validation.

Key Responsibilities:
• Develop test plans and coverage strategies for RTL designs
• Build and enhance reusable verification environments using UVM




• Create and execute various test types including error-injection tests
• Analyze simulation failures and perform root-cause analysis
• Collaborate with cross-functional teams for issue resolution

Requirements:
• Bachelor’s or Master’s degree in Engineering or related field
• 3–10 years experience in ASIC or SoC verification
• Robust knowledge in Verilog, SystemVerilog, UVM
• Proficiency in developing UVM components for verification
• Solid understanding of digital design and simulation methods

Utilize your digital design verification skills to contribute to Qualcomm's innovative projects in the memory subsystem domain.
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📌 Design Verification Engineer at Qualcomm (British Columbia)
🏢 Qualcomm
📍 British Columbia