22 Aug
|
Qualcomm
|
Ontario
Qualcomm Canada ULC seeks a Design Verification Engineer to join its memory subsystem verification team. You will develop verification strategies for memory controllers, DDR/LPDDR/HBM interfaces, and PHY logic, and drive functional and code coverage closure.
The candidate should have hands-on Verilog, SystemVerilog, UVM and SVA experience, and a robust interest in LPDDR, DDR, and HBM technologies, collaborating with RTL, architecture, and modeling teams.
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📌 Memory Subsystem Verification Engineer (Ontario)
🏢 Qualcomm
📍 Ontario