Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? People come to work at Microchip because we help design the technology that runs the world. We take pride in our commitment to employee development, values-based decision making, and robust sense of community, driven by our Vision, Mission, and 11 Guiding Values ; we affectionately refer to it as the Aggregate System and it's won us countless awards for diversity and workplace excellence. we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation.

The Microchip

Timing and Synchronization Team is dedicated to developing world-class network synchronization products. We are at the forefront of creating new timing technologies, including ultra-low-jitter PLLs, IEEE 1588, and Synchronous Ethernet PLLs, that address synchronization challenges in optical, electrical, and packet networks. Our timing solutions are used in diverse applications such as 5G, autonomous vehicles, stock markets, wireless communications, the cable industry, and the Internet of Things (IoT).

Implementation: Implement algorithms, functions, and hardware drivers according to design specifications. Tackle complex technical challenges, perform root-cause analysis, and drive the resolution of critical issues.



MSc or PhD in Electrical Engineering, Computer Engineering, or a related field. Minimum of 6 years of experience in DSP algorithm development, embedded software development, or a combination of both. Extensive experience and deep expertise in C/C++ programming.

Experience developing unit tests for code quality validation. Hands-on experience with scripting languages such as Python and TCL. Knowledge of embedded general-purpose processors and/or embedded DSP architectures and programming. Knowledge of embedded software or firmware, real-time operating systems (RTOS), and hardware/software interactions. Strong theoretical background in digital signal processing algorithms and analysis.

Experience with low-level embedded software development and verification. Familiarity with Agile methodologies and related tools such as Jira, Git, and Confluence.

Travel Time

It consists of competitive base pay, restricted stock units, and quarterly bonus payments. In addition to these components, our package includes health benefits that begin day one, retirement savings plans, and an industry leading IESPP program with a 6-month look back feature. competitive base pay restricted stock units quarterly bonus payments retirement savings plans

📌 Principal DSP Firmware Engineer (Ottawa)
🏢 Microchip Technology
📍 Ottawa