Engineer to lead backend digital execution for photonics CMOS technologies. You will work with a world-class team to define optimization strategies and push timing closure across nodes.
You will own timing constraints development, STA, and tapeout sign-off, collaborating with RTL, architecture and DFT teams. Hybrid work and equity are offered.
📌 Senior Staff ASIC Timing & STA Engineer (Hybrid) (Toronto)
🏢 Lightmatter
📍 Toronto
Reply to this offer
Impress this employer describing Your skills and abilities, fill out the form below and leave Your personal touch in the presentation letter.