Altera in Toronto, Ontario, is seeking an FPGA Compiler Engineer (Placer) to join our Compiler team. You will design and optimize placement algorithms to improve QoR for large FPGA designs and contribute to the end-to-end FPGA compilation flow.
The role requires robust EDA algorithm experience, large-scale optimization, and related FPGA/ASIC flows. Collaboration with routing, timing, and architecture teams is essential, and candidates should have C/C++ skills and hands-on toolchain experience.